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document number: MC34929 rev. 7.0, 11/2006 freescale semiconductor advance information * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2006. all rights reserved. brushless dc 1.0 amp 28 volt motor driver ic the 34929 brushless dc (bldc) motor driver ic is a complete bldc motor driver system in one chip. it is designed to efficiently drive three-phase bldc motors up to 1a and 28v, and has built in protection features making it ideal for a variet y of consumer, portable, and office applications containing small motors. it incorporates digital i/o, making it easy to use with an mcu in a cl osed-loop motor control system. it has a built-in hall-effect sensors interface and a hall sensors voltage supply, so it can operate bldc mo tors as a stand-alone controller/ driver. its sophisticated analog/mixed-signal state machine accommodates several modes of oper ation, including: forward (cw), reverse (ccw), run/stop, braking, variable speed (external pwm), and torque limit (maximu m-current-limit) modes. features ? single-supply operation (8v?28v) ? built-in hall sensors controlled-supply (vh) ? 3-phase hall sensors interface ? two tachometer outputs (1x and 3x hall frequency) ? adjustable maximum current limit (torque limiting) ? adjustable stalled rotor detection and protection ? short circuit detection and protection ? over-temperature detection and thermal shutdown ? undervoltage detection and shutdown ? pb-free packaging designated by suffix code ep. figure 1. 34929 simplified application diagram qfn suffix 98arh99033a 24-pin qfn (4x4x1) ordering information device temperature range (t a ) package MC34929ep -0c to 85c 24 qfn 34929 brushless dc motor driver mcu 34929 pwm run dir 3xtach tach ct gnd cp+ cp- cres v+ v+ cp phc phb pha lss isens pgnd vh hab+ hab- hbc+ hbc- hca+ hca- bdlc motor
analog integrated circuit device data 2 freescale semiconductor 34929 internal block diagram internal block diagram figure 2. 34929 simplifi ed internal block diagram stall det control logic uvlo tlim ilim hca hbc hab low side gate drive sc det high side gate drive regs & v ref v ref v dd v+ vghs charge pump q1 q3 q5 q2 q4 q6 cp+ cp- cres v+ phc phb pha lss isens pgnd vh hab+ hab- hbc+ hbc- hca+ hca- gnd tach 3xtach ct dir run pwm vo g v5v v5v v5v vcc input protection
analog integrated circuit device data freescale semiconductor 3 34929 pin connections pin connections figure 3. 34929 pin connections table 1. 34929 pin definitions pin number pin name pin function formal name definition 1 hca- input hall ca neg receives negative output from sensor located between ?c? and ?a? phases 2 hca+ input hall ca pos receives positive output from sensor located between ?c? and ?a? phases 3 hbc- input hall bc neg receives negative output from sensor located between ?b? and ?c? phases 4 hbc+ input hall bc pos receives positive output from sensor located between ?b? and ?c? phases 5 hab- input hall ab neg receives negative output from sensor located between ?a? and ?b? phases 6 hab+ input hall ab pos receives positive output from sensor located between ?a? and ?b? phases 7 cres component reservoir cap external charge pump resevoir cap 8 cp+ component charge pump pos positive side of charge pumping cap 9 cp- component charge pump neg negative side of charge pumping cap 10 v+ supply positive supply main supply input for device and motor 23 pgnd return power ground power ground 12 ct component timing cap external cap for stall detect timing 13 vh output hall voltage supply voltage for the external hall sensors 14 phc output phase c output half bridge output fo r phase ?c? motor winding 15 pha output phase a output half bridge output for phase ?a? motor winding 16 lss return low side sources common source pin for lower half of bridge 17 phb output phase b output half bridge output for phase ?b? motor winding 18 17 16 15 14 13 2 3 4 5 6 1 8 9 10 11 12 7 23 22 21 20 19 24 pwm run dir 3xtach tach ct gnd cp+ cp- cres v+ phc phb pha lss isens pgnd vh hab+ hab- hbc+ hbc- hca+ hca-
analog integrated circuit device data 4 freescale semiconductor 34929 pin connections 19 run input run run/stop control input (active low = motor running) 20 tach output tach output open-drain-buffered output of sensor ?ab? 21 3xtach output 3x tach output open-drain-buffered, exor? ed output of all three sensors 22 dir input direction direction control input (a ctive low = cw rotation) 11 gnd return signal ground signal ground for device 24 pwm input pwm or enable pwm signal input (active low = outputs enabled) 18 isens input current sense current limiting sense resistor input table 1. 34929 pin de finitions (continued) pin number pin name pin function formal name definition
analog integrated circuit device data freescale semiconductor 5 34929 electrical characteristics maximum ratings electrical characteristics maximum ratings figure 4. printed circuit board la yout for maximum thermal performance table 2. maximum ratings all voltages are with respect to ground. exceeding these rati ngs may cause a malfunction or permanent damage to the device. ratings symbol value unit electrical ratings power supply transient voltage v+ trans 42 v signal i/o pins v i/o -0.6 to 5.5 v open drain outputs (tach and 3xtach) tach out 42 v bridge output continuous current i o(cont) 1.0 a bridge output peak current i o(pk) 1.5 a bridge output voltage v o -1.0 to (v+) +1.0 v hall voltage supply current i vh 30 ma esd voltage (1) human body model (hbm) machine model (mm) v esd 2000 200 v thermal ratings operating ambient temperature t a -0 to 85 c maximum junction temperature t j-max 150 c storage temperature t stg -0 to 150 c thermal resistance junction to ambient (2) r ja <125 c/w power dissipation (3) p d 1.0 w peak package reflow temperature during reflow (4) , (5) t pprt note 5 c notes 1. esd testing is performed in accordance with the human body model (hbm) (c zap = 100 pf, r zap = 1500 ? ), the machine model (mm) (c zap = 200 pf, r zap = 0 ? ), and the charge device model (cdm), robotic (c zap = 4.0pf). 2. with pcb layout comparable top copper and vias as shown in figure 4 , and bottom thermal ground plane of > 9 cm 2 . 3. with specified pcb layout shown in figure 4 under forced convection airflow condition. 4. pin soldering temperature limit is for 10 seconds maximum dura tion. not designed for immersion so ldering. exceeding these lim its may cause malfunction or permanent damage to the device. 5. freescale?s package reflow capability m eets pb-free requirements for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), > go to www.freescale.com > search by part number [e.g. remove prefixes/suffixes and enter the core id to view all orderable parts. (i.e. mc33xxxd enter 33xxx)] > locate your part number and in the details column, select ?view? > select ?environmental and compliance information?
analog integrated circuit device data 6 freescale semiconductor 34929 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electric al characteristics characteristics noted under conditions 8.0 v v sup 28 v, - 0 c t a 85 c, gnd = 0 v unless otherwise noted. typical values noted reflect the approximate parameter means at t a = 25c under nominal conditions unless otherwise noted. characteristic symbol min typ max unit power supply voltage range v+ 8.0 12 28 v suspend power supply current (6) i sa ? 2.0 3.0 ma operation power supply current (7) i q ? 4.0 6.0 ma low v+ detect voltage v+ -lv 5.0 5.5 6.0 v low v+ detect hysteresis v lv-hys ? 100 ? mv logic inputs threshold low (8) v il ? ? 0.8 v logic inputs threshold high (8) v ih 2.0 ? ? v logic inputs hysteresis voltage (8) v i-hys 50 300 ? mv logic input current low (9) i il ? -50 ? a logic input pull-up resistance (10) r pullup ? 100 ? k ? hall inputs voltage sensitivity (11) v h-sens 50 ? ? mv hall inputs common mode voltage range (11) v h-cmm 0.0 ? 3.0 v hall inputs hysteresis voltage (11) v h-hys ? 15 ? mv hall input current (11) i h -10 ? 10 a charge pump output voltage v ghs ? ? (v+) +12 v charge pump reservoir capacitor c cres ? 0.1 ? f charge pump capacitor c cp ? 0.1 ? f logic output voltage low (12) v ol ? ? 0.4 v logic output leakage current high (13) i oh ? ? 10 a hall sensors supply voltage (14) v h ? ? (v+) -1.0 v notes 6. with device in suspend mode (run command = false). 7. the current consumed internal to the ic, but not including current output for motor drive. 8. pwm, run, and dir pins. 9. pwm, run, and dir pins with r-pullup = 100 k ? . 10. internal pullup resistance value can vary by 20%. 11. hca-, hca+, hbc-, hbc+, hab-, hab+ pins. 12. tach and 3xtach pins @ i ol = 5.0 ma. 13. tach and 3xtach pins @ v oh = 24 v. 14. vh pin @ i o -hall = 10 ma.
analog integrated circuit device data freescale semiconductor 7 34929 electrical characteristics static electrical characteristics high side r ds-on (15) r on-t ? 0.25 0.5 ? low side r ds-on (15) r on-b ? 0.25 0.5 ? high side r ds-on (hot) (16) r on-t_ref ? 0.3 0.6 ? low side r ds-on (hot) (16) r on-b_ref ? 0.3 0.6 ? h-bridge mosfets? body-diode forward voltage drop (17) v f-ld ? 1.2 ? v stall detection timer output current i o-ldc ? 128 ? a stall detection timer detection voltage v-ct det ? 2.5 ? v current limit sense voltage threshold v isens 0.09 0.1 0.11 v thermal shutdown temperature t sd 150 165 180 c t sd hysteresis t sd-hys ? 30 ? c notes 15. @ t a = 25c, 14 v =< v+ =< 28 v, i o = 1.0 a. 16. typical value (for reference only) @ 85c =< t j =< 150c, 8.0 v =< v+ =< 14 v. not tested; not guaranteed. 17. @ i f = 1.0 a for each output mosfet (measured from source to drain). table 3. static electrical characteristics (continued) characteristics noted under conditions 8.0 v v sup 28 v, - 0 c t a 85 c, gnd = 0 v unless otherwise noted. typical values noted reflect the approximate parameter means at t a = 25c under nominal conditions unless otherwise noted. characteristic symbol min typ max unit
analog integrated circuit device data 8 freescale semiconductor 34929 electrical characteristics dynamic elecrtical characteristics dynamic elecrtical characteristics table 4. dynamic electri cal characteristics characteristics noted under conditions 7.0 v v sup 18 v, - 0 c t a 85 c, gnd = 0 v unless otherwise noted. typical values noted reflect the approximate parameter means at t a = 25c under nominal conditions unless otherwise noted. characteristic symbol min typ max unit charge pump switching frequency f cp ? 250 ? khz high-side gate-drive supply wake-up time t wake ? 1.0 2.0 ms controlled braking period t cbrk ? 20 ? ms low v+ detect suspend time t spnd ? 100 ? s power-on reset wait time t wait ? 1.0 ? ms maximum pwm input frequency f pwm ? ? 100 khz propagation delay time (18) t delay ? ? (1.0) s output low side off time (rise) (18) t ls-off ? (25) ? ns output high side on time (rise) (18) t hs-on ? (25) ? ns output high side off time (fall) (18) t hs-off ? (25) ? ns output low side on time (fall) (18) t ls-on ? (175) ? ns shoot through prevention time (output h-bridge high-z) (18) t off ? (100) ? ns notes 18. load condition: star connected 5.6 ? load resistances (approximates 1.0 a output current at 12v v+).
analog integrated circuit device data freescale semiconductor 9 34929 electrical characteristics timing diagrams timing diagrams figure 5. high-side gate-dri ve supply wake-up time ?twake? figure 6. timing for reset on low v+ detect figure 7. stall detection/protection timing run t wake 90% v ghs v+ reset (internal) v+ -lv t spnd v lv-hys t wait x reset run dir hab hbc hca ct stall_detect stall_protect stall ~2 sec @ 0.1 f or x x
analog integrated circuit device data 10 freescale semiconductor 34929 electrical characteristics timing diagrams figure 8. rise time, fall time, shoot through prevention timing figure 9. controlled brake mode timing t off ls-off hs-on 90% 10% 90% 10% t off hs-off ls-on 90% 90% 10% 10% output rise time = ls-offf + hs-on output fall time = hs-off + ls-on hab hbc dir hca c b a tach 3xtach cw rotation controlled brake reverse brake stop ccw rotation hab t cbrk
analog integrated circuit device data freescale semiconductor 11 34929 electrical characteristics timing diagrams figure 10. stalled rotor detection logic diagram figure 11. synchronous rectification ? slow-decay current ? example stall_detect counter count reset carry stall_detect stall det. latch stall_protect ct 0.1 f dir hab hbc hca internal reset run hab hbc hca reset rst rotation detection relaxation oscillator on off on off off off pwm = enabled on off on off off off pwm = disabled
analog integrated circuit device data 12 freescale semiconductor 34929 electrical characteristics timing diagrams figure 12. pwm switching waveforms figure 13. isens cu rrent limit waveforms figure 14. propagation delay pwm c a b pwm phases t delay
analog integrated circuit device data freescale semiconductor 13 34929 functional description introduction functional description introduction the MC34929 brushless dc motor driver ic is a complete bldc motor driver system in one chip. it is designed to efficiently drive three-phase bldc motors up to 1.0 a and 28 v, and has built in protection f eatures making it ideal for a variety of consumer and office applications containing small motors. because it has a built-in hall-sensors interface and hall sensors bias supply, it can operate motors either stand- alone (e.g., with pushbutton/swit ch interface), or under the control of an external mcu. its sophisticated analog/mixed- signal state machine acco mmodates several modes of operation, including: clockwis e, counterclockwise, run/stop, brake, variable speed (pwm), and torque limit (current limit). functional pin description hal ca neg (hca-) receives negative output fr om sensor located between ?c? and ?a? phases. hal ca pos (hca+) receives positive output from sensor located between ?c? and ?a? phases. hal bc neg (hbc-) receives negative output from sensor located between ?b? and ?c? phases. hal bc pos (hbc+) receives positive output from sensor located between ?b? and ?c? phases. hal ab neg (hab-) receives negative output from sensor located between ?a? and ?b? phases. hal ab pos (hab+) receives positive output from sensor located between ?a? and ?b? phases. reservoir cap (cres) external charge pu mp resevoir cap. charge pump pos (cp+) positive side of charge pumping cap. charge pump neg (cp-) negative side of charge pumping cap. positive supply (v+) main supply input for device and monitor. signal ground (gnd) signal ground for the device. timing cap (ct) external cap for stall detect timing. hall voltage (vh) supply voltage for the external hall sensors. phase c output (phc) half bridge output for phase ?c? motor winding. phase a output (phc) half bridge output for phase ?a? motor winding. low side sources (lss) common source pin for lower half of bridge. phase b output (phb) half bridge output for phase ?b? motor winding. current sense (isens) current limiting sense resistor input. run ( run ) run/stop control input (active low = motor running). tach output (tach) open-drain-buffered out put of sensor ?ab?. 3x tach output (3xtach) open-drain-buffered, exor?ed output of all three sensors. direction ( dir ) direction control input (active low = cw rotation). power ground (pgnd) power ground. pwm or enable ( pwm ) pwm signal input (active low = outputs enabled).
analog integrated circuit device data 14 freescale semiconductor 34929 functional device operation functional device operation the following paragraphs describe the internal function of the 34929 as shown in figure 2 . charge pump this charge pump provides the vghs and internal power supply for the high side power mosfet gate drive. its output voltage is limited to v+ +10v to prevent damage to the driver circuits or mosfet gates. ho wever, vghs will be below v+ +10v if v+ supply voltage is below 12v. the switching frequency of this charge pump is ~250 khz. the vghs supply wakes up typically 1m s after the run command is initiated. regulators and voltage reference internal regulators provide operating and reference voltages for use by the analog/mi xed-signal circuitry. this function also includes providing the drive voltage for the low- side gate drivers. the regulators for the internal logic and analog circuits comprise regulators for the logic circuits, and regulators for the analog circ uits (including input/output buffering, but excepting the power outputs). a bandgap circuit generates the internal precision reference voltage (1.25 v). this is used for bi asing the comparators and other analog circuits. (note: this reference voltage is not externally available.) internal clock the internal clock generates a stable pulse-train for use by the ic?s logic circuits. it s output frequency is 1.0 mhz 30%. the clock circuit also includes frequency-dividers to derive lower frequency pulse trains for use by circuits such as the charge pump and various internal timers, etc.). input logic all logic input pins have internal 100k ? pull-ups connected to the internal vdd logic supply. the logic input circuitry includes the following inputs: ? p wm input controls the speed of motor. output = ?enable? when pwm = ?l?, and then output = ?disable? (means ?z?: high impedance) when pwm = ?h?. ? run input controls the start and stop function. when run = ?h?, this ic will go to suspend mode via controlled brake state and suspend unnecessary circuits (internal osc, counters, charge pump, stal l detection and protection). ? dir input controls the direct ion of motor. when dir is flipped, the motor will be reverse, brake through controlled brake, and then rotate to reverse direction. this dir pin has capability to be applied to v+ + vf. hall comparators the hall comparators square-up the signals from the hall sensors. hall switch a high side switch to turn-on and turn-off the hall supply current. tach, 3xtach output the tach outputs are as follows: tach is the inverted hab signal. 3xtach is from in verted exor with all three hall sensor signals. these outputs are both open drain type. low v+ detect the low v+ voltage detection circuit monitors v+; if the v+ voltage falls below the threshold, the ic will reset after t spnd time. this circuitry will not respond to negative-going transients on v+ within the t spnd time period. once placed in suspend mode, v+ must return to a level greater than the detection threshold plus and additional 100mv (typical) hysteresis, and stay there for the t wait period, before the ic will come out of suspend mode. reset the reset function works as follows: when an error condition, such as v+ falling below the v+ -lv threshold, is detected, the ic will be in placed in suspend mode (all output mosfets set to a high impedance state) by way of a controlled-braking transition state. this will occur regardless of run command status. note, the error condition must exist for a time period greater than t spnd before the internal reset will be generated. when the error condition resolves, suspend mode will be released after the t wait period. (see figure 6 .) stall detection and protection the stall detection and protecti on circuit actively monitors operation for a stalled rotor event while the run command is set = ?true?. a stall is detected as follows (see figure 7 ): 1) a sawtooth waveform generated at the timing capacitor, tc, is monitored by the stall- detect counter which is counting the sawtooth cycles. 2) the stall-detect counter is being reset (cleared) every time there is a transition on any of the outputs from the hall comparators (hab, hbc, or hca). 3) a ?stall condition? is assumed anytime the stall-detect counter is allowed to overflow, (i .e., anytime the counter is not cleared back to zero by the exor?ed output of the hab, hbc, and hca comparators). this can only occur when at least two of the signals (hab, hbc, or hca) have become static (fixed to ?h? or ?l?).
analog integrated circuit device data freescale semiconductor 15 34929 functional device operation 4) once the internal stall-detect signal is asserted, an internal stall-protect signal is latched. the stall-protect latch keeps the ic in suspend-mode ev en if the stall condition is subsequently resolved. 5) the stall-protect latch can only be reset by toggling v+, run or dir . pwm control the phase outputs can be controlled with a pwm input. during pwm?ing, the freewheel ing currents generated by the motor?s windings are synchronously rectified by the output h- bridge to produce a slow decay waveform and avoid dissipating excess power in the ic (see figure 12 ). current limit the current limit function provides the means to set the maximum allowed motor current, and thus effectively sets the maximum possible torque the motor can apply to its load. the function is implemented via an external sense resistance r isense through which flows the return current of the 3- phase h-bridge. the voltage drop across r isense is monitored by the isens pin, a nd whenever the threshold of 0.1v is exceeded, the phase that is currently low will be brought high. the output will be released ~40 s later. the output will then follow the pwm input once again. controlled brake mode the controlled brake mode prevents high back-emf voltages from being created when decelerating the motor to change direction. when the di r command changes state, all three phases are held low for the time period ? t cbrk ? (~20 msec @ 500 rpm with a 12-pole rotor). see figure 12 . short circuit protection the short circuit protection func tion utilizes sense-fets in the h-bridge high-side mosfets. if a short circuit occurs the sense-fet portion of the affe cted high-side mosfet?s cells will provide an output to the sh ort-circuit detection circuitry that exceeds the preset thre shold, and the short-circuit detection circuitry will immediately set all phase output to low (i.e., all low-side mosfets will be turned on). thermal shutdown the thermal shutdown protecti on function utilizes an on- chip temperature sensor and a threshold comparator with preset hysteresis. if the die temperature exceeds the t sd temperature threshold, the protection circuitry will immediately set all phase outputs to off (i.e., all h-bridge mosfets will be set to a high-impedance state). thermal shutdown reacts to any cause of over-temperature, including that resulting from prolonged running at high currents with insufficient cooling.
analog integrated circuit device data 16 freescale semiconductor 34929 functional device operation logic commands and registers logic commands and registers table 5. 3 phase motor drive truth table dir hall ab hall bc hall ca pwm c b a tach 3xtach x l l l x z z z h h x h h h x z z z l l l l l h l z h l h h l l h l l h l z h h l l h h l h z l h l l h l l l l z h l h l h l h l l h z l l l h h l l z l h l l h l l h l z l h h h h l h l l l h z h h h l h h l l z h h l h h l l l h z l l h h h l h l h l z l l h h h l l z h l l l l l l h h z h h h h l l h l h h h z h h l l h h h h z h h l l h l l h h z h l h l h l h h h h z l l l h h l h z h h l l h l l h h z h h h h h l h l h h h z h h h l h h h h z h h l h h l l h h z h l h h h l h h h h z l l h h h l h z h h l l notes dir: l = cw, h = ccw; hall signals: l = (hx + < hx -), h = (hx + > hx-); pwm: l = enable, h = disable run = l, internal reset = h, all protections = ?l? (negated). when pwm is disabled (h), the output will be in slow dec ay mode on the high-side with synchronous rectification.
analog integrated circuit device data freescale semiconductor 17 34929 functional device operation logic commands and registers table 6. suspend mode and protection modes truth table run dir under voltage stall detect current limit short circuit tsd reset stall protect phases tach 3xtach hb suspend mode h x x x x x x x x l->z h off thermal shutdown l x x x x x h x x z h off short circuit protection l x x x x h l h x l h off current limit detection l x x x h l l h x int.pwm run on stall detection and protection l x l h l l l h h z stall on l x l l l l l h h z run on h->l x l l l l l h l run run on l flip l l l l l h l run run on l x h->l l l l l h l run run on under voltage detection x x h x x x x l l l->z h off l x h->l l l l l h l run run on normal mode l x l l l l l h l run run on notes run: start at ?l? and stop at ?h?. ?h->l? indicates input is toggled. dir: cw direction at ?l? and ccw direction at ?h? and ?f lip? indicates change of logic level to opposite state. ?under voltage?, ?stall detect?, ?current limit?, short circuit?, ?tsd?, and ?stall protect? are ?h igh? active internal signals . ?reset? is a ?low? active internal signal. under voltage: h->l indicates removing then re-applying power (v+). ?run? status indicates operation in 3-phase commutation mode. commanding a ?stop? state from a ?run? stat e will always result in a transition th rough the ?controlled brake? state (to preven t high voltage back-emf), before changing to off (high-z).
analog integrated circuit device data 18 freescale semiconductor 34929 typical applications typical applications figure 15. simple application circuit stall det control logic uvlo tlim ilim hca hbc hab low side gate drive sc det high side gate drive regs & v ref v ref v dd v+ vghs charge pump q1 q3 q5 q2 q4 q6 cp+ cp- cres v+ phc phb pha lss isens pgnd vh hab+ hab- hbc+ hbc- hca+ hca- gnd tach 3xtach ct dir run pwm vo g mcu v+ cp bdlc motor 1 2 3 4 5 6 13 23 18 16 15 17 14 10 7 9 8 24 19 22 22 12 20 11 0.1 f 0.1 f 0.1 f v+ 1.0 f
analog integrated circuit device data freescale semiconductor 19 34929 packaging package dimensions packaging package dimensions for the most current package revision, visit www.freescale.com and perform a keyword search using the ?98a? listed below. qfn suffix 24-pin plastic package 98arh99033a issue c
analog integrated circuit device data 20 freescale semiconductor 34929 packaging package dimensions qfn suffix 24-pin plastic package 98arh99033a issue c
analog integrated circuit device data freescale semiconductor 21 34929 revision history revision history revision date description of changes 6.0 7/2005 ? implemented revision history page ? updated to the freescale format ? changed status to advance
analog integrated circuit device data 22 freescale semiconductor 34929 revision history
MC34929 rev. 7.0 11/2006 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2006. all rights reserved. how to reach us: home page: www.freescale.com e-mail: support@freescale.com usa/europe or locations not listed: freescale semiconductor technical information center, ch370 1300 n. alma school road chandler, arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) support@freescale.com japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com

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